Virtual JTAG access SRAM

In this approach, PC`s software can directly use Altera USB-Blaster to access the SRAM of the FPGA development board. It is a very good approach use to transfer small data. Because this usb access approach can`t meet my bandwidth requirement, I pause this project. I use FX2LP to get more communication bandwidth. I put source code of this project to this link.

I implement this approach in altera cycloneIII device, and the miatc3x development board is shown as follow.

Altera CycloneIII & Taiwan`s $10 coin

The front of the development board

The back of the development board

I implement this project when I am a newbie, and I don`t use SDC to constrain this design at the time. It maybe make the timing can`t met. The diagram of this project is shown as follow.

Altera USB-Blaster must use TCL to opetate, and TCL script can use tcl/tk to create a GUI. The operation flow of the GUI is shown as follow.

This GUI can read a image form PC`s disk, and uses Altera USB-Blaster to write sram of the FPGA board. After writing sram, the GUI can use usb-blaster to read sram of the FPGA board, and show the image data to the image plane of the GUI.